Sciweavers

59
Voted
DATE
2010
IEEE
138views Hardware» more  DATE 2010»
15 years 2 months ago
Checking and deriving module paths in Verilog cell library descriptions
—Module paths are often used to specify the delays of cells in a Verilog cell library description, which define the propagation delay for an event from an input to an output. Sp...
Matthias Raffelsieper, Mohammad Reza Mousavi, Chri...