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126
Voted
FMCAD
2008
Springer
96
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Formal Methods
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FMCAD 2008
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Recording Synthesis History for Sequential Verification
15 years 5 months ago
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www.eecs.berkeley.edu
Performing synthesis and verification in isolation has two undesirable consequences: (1) verification runs the risk of becoming intractable, and (2) strong sequential optimization...
Alan Mishchenko, Robert K. Brayton
claim paper
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