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ISSS
2000
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Instruction-based System-level Power Evaluation of System-On-A-Chip Peripheral Cores
15 years 7 months ago
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Various system-level core-based power evaluation approaches for core types like microprocessors, caches, main memories, and buses, have been proposed in the past. Approaches for o...
Tony Givargis, Frank Vahid, Jörg Henkel
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