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145
Voted
DAC
2010
ACM
152
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Computer Architecture
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DAC 2010
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Instruction cache locking using temporal reuse profile
15 years 2 months ago
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www.comp.nus.edu.sg
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
claim paper
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