Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
PDF Tools
Image Tools
Text Tools
OCR Tools
Symbol and Emoji Tools
On-screen Keyboard
Latex Math Equation to Image
Smart IPA Phonetic Keyboard
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
120
click to vote
VLSID
2002
IEEE
78
views
VLSI
»
more
VLSID 2002
»
Optimization of Test Accesses with a Combined BIST and External Test Scheme
16 years 3 months ago
Download
www.emb.ics.tut.ac.jp
External pins for test are precious hardware resources because this number is strongly restricted. Cores are tested via test access mechanisms (TAMs) such as a test bus architectu...
Makoto Sugihara, Hiroto Yasuura
claim paper
Read More »