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92
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DFT
2005
IEEE
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VLSI
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DFT 2005
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Methodologies and Algorithms for Testing Switch-Based NoC Interconnects
15 years 8 months ago
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www.eecs.wsu.edu
In this paper, we present two novel methodologies for testing the interconnect fabrics of network-on-chip (NoC) based chips. Both use the concept of recursive testing, with differ...
Cristian Grecu, Partha Pratim Pande, Baosheng Wang...
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