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144
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ISCAS
2006
IEEE
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ISCAS 2006
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Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis
15 years 9 months ago
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www.cs.bris.ac.uk
In this paper we present two polynomial time-complexity heuristic algorithms for optimization of gate-oxide leakage (tunneling current) during behavioral synthesis through simulta...
Saraju P. Mohanty, Elias Kougianos, Ramakrishna Ve...
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