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110
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ICCAD
1999
IEEE
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ICCAD 1999
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Symbolic functional and timing verification of transistor-level circuits
15 years 7 months ago
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www.cs.cmu.edu
We introduce a new method of verifying the timing of custom CMOS circuits. Due to the exponential number of patterns required, traditional simulation methods are unable to exhaust...
Clayton B. McDonald, Randal E. Bryant
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