Sciweavers

TC
2002
13 years 11 months ago
On Augmenting Trace Cache for High-Bandwidth Value Prediction
Value prediction is a technique that breaks true data dependences by predicting the outcome of an instruction and speculatively executes its data-dependent instructions based on th...
Sang Jeong Lee, Pen-Chung Yew
TOCS
1998
83views more  TOCS 1998»
13 years 11 months ago
Using Value Prediction to Increase the Power of Speculative Execution Hardware
This paper presents an experimental and analytical study of value prediction and its impact on speculative execution in superscalar microprocessors. Value prediction is a new para...
Freddy Gabbay, Avi Mendelson
BIS
2009
107views Business» more  BIS 2009»
14 years 28 days ago
Framework for Value Prediction of Knowledge-Based Applications
Knowledge-based applications are characterized by their use of machine-understandable formalizations of expert knowledge. Complex knowledge structures, and the features which explo...
Ali Imtiaz, Tobias Bürger, Igor O. Popov, Ele...
ARCS
2006
Springer
14 years 3 months ago
Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput?
While trace cache, value prediction, and prefetching have been shown to be effective in the single-threaded superscalar, there has been no analysis of these techniques in a Simulta...
Chen-Yong Cher, Il Park, T. N. Vijaykumar
MICRO
1996
IEEE
96views Hardware» more  MICRO 1996»
14 years 4 months ago
Exceeding the Dataflow Limit via Value Prediction
For decades, the serialization constraints imposed by true data dependences have been regarded as an absolute limit--the dataflow limit--on the parallel execution of serial progra...
Mikko H. Lipasti, John Paul Shen
ICS
1999
Tsinghua U.
14 years 4 months ago
Classifying load and store instructions for memory renaming
Memory operations remain a significant bottleneck in dynamically scheduled pipelined processors, due in part to the inability to statically determine the existence of memory addr...
Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary ...
ISCA
1999
IEEE
94views Hardware» more  ISCA 1999»
14 years 4 months ago
Storageless Value Prediction Using Prior Register Values
This paper presents a technique called register value prediction (RVP) which uses a type of locality called register-value reuse. By predicting that an instruction will produce th...
Dean M. Tullsen, John S. Seng
ISCA
1999
IEEE
90views Hardware» more  ISCA 1999»
14 years 4 months ago
Selective Value Prediction
Value Prediction is a relatively new technique to increase instruction-level parallelism by breaking true data dependence chains. A value prediction architecture produces values, ...
Brad Calder, Glenn Reinman, Dean M. Tullsen
IEEEPACT
1999
IEEE
14 years 4 months ago
In Search of Speculative Thread-Level Parallelism
This paper focuses on the problem of how to find and effectively exploit speculative thread-level parallelism. Our studies show that speculating only on loops does not yield suffi...
Jeffrey T. Oplinger, David L. Heine, Monica S. Lam
MICRO
2000
IEEE
61views Hardware» more  MICRO 2000»
14 years 4 months ago
Reducing wire delay penalty through value prediction
In this work we show that value prediction can be used to avoid the penalty of long wire delays by predicting the data that is communicated through these long wires and validating...
Joan-Manuel Parcerisa, Antonio González