Analyzing Internal-Switching Induced Simultaneous Switching Noise

The internal-switching induced simultaneous switching noise (SSN) is studied in the paper. Unlike ground bounce caused by driving off-chip loading, both power-rail and ground-rail wire/pin impedances are important in evaluating internal SSN, and the double negative feedback mechanism should be accounted for. Based on the lumped-model analysis and taking into account the parasitic effects and velocity-saturation effect of MOS transistors, a novel analytical model is developed which includes both switching and non-switching gates. The proposed model is employed to analyze on-chip decoupling capacitance, wire/pin inductance effect and loading effect analytically. Good agreements with SPICE simulations are obtained for submicron technology.

• Type: Conference
• Year: 2003
• Where: ISQED
• Authors: Li Yang, J. S. Yuan
• Keywords: Hardware, ISQED 2003, On-chip Decoupling Capacitance, Simultaneous Switching Noise, Wire/pin Inductance Effect