ISQED
2003
IEEE
13 years 9 months ago
2003
IEEE
This paper presents an electrical and thermal performance analysis of System-in-a-Package (SiP) memory/logic implementation platform based on ChipLaminate-Chip (CLC) technology. I...
ISQED
2003
IEEE
13 years 9 months ago
2003
IEEE
The importance of an interconnect pattern density model in ASIC design flow for a 90nm technology is presented. It is shown that performing the timing analysis at the worst-case c...
ISQED
2003
IEEE
13 years 9 months ago
2003
IEEE
In this paper an embedded IDDQ testing architecture is presented that targets to overcome the excessive hardware overhead requirements in built-in current sensing based testing ap...
ISQED
2003
IEEE
13 years 9 months ago
2003
IEEE
The amplitude of coupled noise is often used in estimating the crosstalk effect. Coupling noise-induced delay measures the impact of crosstalk on circuit performance. Efficient c...
ISQED
2003
IEEE
13 years 9 months ago
2003
IEEE
The internal-switching induced simultaneous switching noise (SSN) is studied in the paper. Unlike ground bounce caused by driving off-chip loading, both power-rail and ground-rail...
ISQED
2003
IEEE
13 years 9 months ago
2003
IEEE
As the portion of coupling capacitance increases in smaller process geometries, accurate coupled noise analysis is becoming more important in current design methodologies. We prop...
ISQED
2003
IEEE
13 years 9 months ago
2003
IEEE
In this paper, an algorithm for the coupled simulation of circuit and piezoelectric laminate devices is presented. A finite element solver for piezoelectric laminates is included ...
ISQED
2003
IEEE
13 years 9 months ago
2003
IEEE
Inductance associated with on-chip wires can no longer be ignored as chip operation frequencies increase into GHz regime. Because the magnetic field propagates a very long range, ...
ISQED
2003
IEEE
13 years 9 months ago
2003
IEEE
ISQED
2003
IEEE
13 years 9 months ago
2003
IEEE
In this paper, we propose a new physical synthesis methodology, PDL, which relaxes the timing constraints to obtain best optimality in terms of layout quality and timing quality. ...