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7

ISQED
2002
IEEE

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Synthesis of Selectively Clocked Skewed Logic Circuits

13 years 9 months ago

Synthesis of Selectively Clocked Skewed Logic Circuits

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Aiqun Cao, Naran Sirisantana, Cheng-Kok Koh, Kaush

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Added	15 Jul 2010
Updated	15 Jul 2010
Type	Conference
Year	2002
Where	ISQED
Authors	Aiqun Cao, Naran Sirisantana, Cheng-Kok Koh, Kaushik Roy

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