Stochastic Evolution Algorithm For Technology Mapping

A new technology mapper SELF-Map for LookUp Table LUT based Field Programmable Gate Arrays FPGAs is described. SELF-Map is based on the Stochastic Evolution SE algorithm. The state space model of the problem is de ned and suitable cost function which allows optimization for area, delay, or area-delay combinations is proposed. Experimental results show that SELF-Map has an overall better performance compared to other algorithms reported in the literature.

• Type: Conference
• Year: 1998
• Where: GLVLSI
• Authors: Ahmad S. Al-Mulhem, Alaaeldin Amin, Habib Youssef
• Keywords: Gate Arrays FPGAs, GLVLSI 1998, LookUp Table LUT, Technology Mapper Self-map, VLSI