Evaluation of a Low-Power Reconfigurable DSP Architecture

Abstract. Programmability is an important capability that provides flexible computing devices, but it incurs significant performance and power penalties. We have proposed an architecture that relies on dynamic reconfiguration of hardware resources to implement low-power and programmable processors for DSP applications. In this paper, we evaluate this architectural approach and compare it to other programmable architectures.

• Type: Conference
• Year: 1998
• Where: IPPS
• Authors: Arthur Abnous, Katsunori Seno, Yuji Ichikawa, Marlene Wan, Jan M. Rabaey
• Keywords: Distributed And Parallel Computing, Flexible Computing Devices, Important Capability, IPPS 1998, Programmable Processors