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ISSS
1998
IEEE

Instruction Encoding Techniques for Area Minimization of Instruction ROM

13 years 8 months ago
Instruction Encoding Techniques for Area Minimization of Instruction ROM
In this paper, we propose instruction encoding techniques for embedded system design, which encode immediate fields of instructions to reduce the size of an instruction memory. Although our proposed techniques require an additional decoder for the encoded immediate values, experimental results demonstrate the effectiveness of our techniques to reduce the chip area.
Takanori Okuma, Hiroyuki Tomiyama, Akihiko Inoue,
Added 05 Aug 2010
Updated 05 Aug 2010
Type Conference
Year 1998
Where ISSS
Authors Takanori Okuma, Hiroyuki Tomiyama, Akihiko Inoue, Eko Fajar, Hiroto Yasuura
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