A Metamodeling based Framework for Architectural Modeling and Simulator Generation

Functional validation of microprocessors is growing in complexity in current and future microprocessors. The informal specification document from which the various collaterals are manually derived to validate the implementation, suffer from inconsistencies and are not extensible. We propose a metamodeling-driven microprocessor modeling and validation environment (MMV) to address this problem. In this paper, we illustrate the architectural description language in MMV developed as a metamodel. The architectural concepts are expressed generically and separated from the target specifics, which allows for a customizable code generation capability. We also illustrate the translation of instruction descriptions in the architectural model into executable description in C++ (ALGS). Furthermore, we show how the target and programming specifics are used to adapt the simulation model for next generation architectural requirements.

• Type: Conference
• Year: 2007
• Where: FDL
• Authors: Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla
• Keywords: Architectural, Architectural Description Language, FDL 2007, Informal Specification Document, Natural Language Processing