Efficient decoupling capacitance budgeting considering operation and process variations

This paper solves the variation-aware on-chip decoupling capacitance (decap) budgeting problem. Unlike previous work assuming the worst-case current load, we develop a novel stochastic current model, which efficiently and accurately captures operation variation such as temporal correlation between clock cycles and logic-induced correlation between ports. The models also considers current variation due to process variation with spatial correlation. We then propose an iterative alternative programming algorithm to solve the decap budgeting problem under the stochastic current model. Experiments using industrial examples show that compared with the baseline model which assumes maximum currents at all ports and under the same decap area constraint, the model considering temporal correlation reduces the noise by up to 5

• Type: Conference
• Year: 2007
• Where: ICCAD
• Authors: Yiyu Shi, Jinjun Xiong, Chunchen Liu, Lei He
• Keywords: Hardware, ICCAD 2007, Operation Variation, Process Variations, Stochastic Current Model