Energy-efficient instruction cache using page-based placement

Energy consumption is a crucial factor in designing batteryoperated embedded and mobile systems. The memory system is a major contributor to the system energy in such environments. In order to optimize energy and energy-delay in the memory system, we investigate ways of splitting the instruction cache into several smaller units, each of which is a cache by itself called subcache. The subcache architecture employs a page-based placement strategy, a dynamic cache line remapping policy and a predictive precharging policy in order to improve the memory system energy behavior. Using applications from the SPECjvm98 and SPECint2000 benchmarks, the proposed subcache architecture is shown to be e ective in improving both the energy and energy-delay metrics.

• Type: Conference
• Year: 2001
• Where: CASES
• Authors: Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
• Keywords: Cache, CASES 2001, Energy Consumption, Subcache Architecture, System Software