Scalable performance scheduling for hardware-software cosynthesis

The paper presents a static process schedulingapproach as a front-end to hardware-software cosynthesis of small embedded systems which allows global system optimization. Unlike earlier approaches, scheduling is executed before hardware definition assuming scalable system performance. Scheduling supports process communication and external timing requirements. We explain the algorithm and give results using an example.

• Type: Conference
• Year: 1995
• Where: EURODAC
• Authors: Thomas Benner, Rolf Ernst, Achim Österling
• Keywords: EURODAC 1995, External Timing Requirements, Small Embedded Systems, Static Process Schedulingapproach, VHDL