Automatic test generation using genetically-engineered distinguishing sequences

A fault-oriented sequential circuit test generator is described in which various types of distinguishing sequences are derived, both statically and dynamically, to aid the test generation process. A two-phase algorithm is used during test generation. The rst phase activates the target fault, and the second phase propagates the fault e ects FE's from the ip- ops with assistance from the distinguishing sequences. This strategy improves the propagation of FE's to the primary outputs, and the overall fault coverage is greatly increased. In our new test generator, DIGATE, genetic algorithms are used to derive both activating and distinguishing sequences during test generation. Our results show very high fault coverages for the ISCAS89 sequential benchmark circuits and several synthesized circuits.

• Type: Conference
• Year: 1996
• Where: VTS
• Authors: Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel
• Keywords: Distinguishing Sequences, Hardware, Test Generation, Test Generator, VTS 1996