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DAC
2000
ACM

Depth optimal incremental mapping for field programmable gate arrays

14 years 10 months ago
Depth optimal incremental mapping for field programmable gate arrays
In this paper, we study the incremental t echnology mapping problem for lookup-table (LUT) based Field Programmable Gate Arrays (FPGAs) under incremental changes. Given a gate-level network, a mapping solution associated with it, and a sequence of changes to the original network, we c ompute a new mapping solution by modifying the existing one. Moreover, we assume that the given mapping solution is depth-optimal and we are required to come up with a modified mapping solution that maintains the depth optimality. The objective of our incremental mapper is to maintain d epth-optimality with very high efficiency while minimizes the modifications to the existing mapping solution. We revealed a set of sufficient conditions for maintaining depth optimal mapping solution after a sequence of incremental changes. Based on these results, we developed a very fast incremental technology mapping algorithm, called IncFlow, that runs up to 300 x faster than the well-known d epth-optimal FlowMap algor...
Jason Cong, Hui Huang
Added 13 Nov 2009
Updated 13 Nov 2009
Type Conference
Year 2000
Where DAC
Authors Jason Cong, Hui Huang
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