19 search results - page 1 / 4 » Depth optimal incremental mapping for field programmable gat... |
DAC
2000
ACM
14 years 6 months ago
2000
ACM
In this paper, we study the incremental t echnology mapping problem for lookup-table (LUT) based Field Programmable Gate Arrays (FPGAs) under incremental changes. Given a gate-lev...
IJVR
2007
13 years 5 months ago
2007
—To construct 3D virtual scenes from two-dimensional images with depth information, image warping techniques could be used. In this paper, a novel approach of cylindrical depth i...
EH
2004
IEEE
13 years 9 months ago
2004
IEEE
Field programmable gate arrays (FPGAs) are becoming increasingly important implementation platforms for digital circuits. One of the necessary requirements to effectively utilize ...
TCAD
2008
13 years 5 months ago
2008
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
GLVLSI
1998
IEEE
13 years 10 months ago
1998
IEEE
A new technology mapper SELF-Map for LookUp Table LUT based Field Programmable Gate Arrays FPGAs is described. SELF-Map is based on the Stochastic Evolution SE algorithm. The stat...