Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

6

TCAD
2002

favoriteEmaildiscussreport

77views more TCAD 2002»

Fast and exact transistor sizing based on iterative relaxation

13 years 4 months ago

Fast and exact transistor sizing based on iterative relaxation

Download www.ece.umn.edu

Vijay Sundararajan, Sachin S. Sapatnekar, Keshab K

Real-time Traffic

TCAD 2002 |

claim paper

Related Content

» Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation

» MINFLOTRANSIT mincost flow based transistor sizing tool

» Learning Bayesian Network Structure using LP Relaxations

» Efficient SecondOrder Iterative Methods for IR Drop Analysis in Power Grid

» MultiTerminal Net Routing for Partial CrossbarBased MultiFPGA Systems

» Network Topology Inference Based on EndtoEnd Measurements

» Hierarchical Eigensolver for Transition Matrices in Spectral Methods

» CO3 for ultrafast and accurate interactive segmentation

» Computing LTS Regression for Large Data Sets

Post Info
More Details (n/a)

Added	23 Dec 2010
Updated	23 Dec 2010
Type	Journal
Year	2002
Where	TCAD
Authors	Vijay Sundararajan, Sachin S. Sapatnekar, Keshab K. Parhi

Comments (0)