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EURODAC
1994
IEEE

Generating VHDL models from natural language descriptions

13 years 8 months ago
Generating VHDL models from natural language descriptions
This paper describes two approaches to the automatic generation of behavioral VHDL models from descriptions written in natural language. Both approaches are based on a modeling style in which behavior is represented by a system of interconnected processes. The first approach employs a semantic grammar to directly generate a single VHDL process from a paragraph written in a restricted English called ModelSpeak. The second approach accepts more general English and generates models consisting of multiple processes.
Walling R. Cyre, Jim Armstrong, M. Manek-Honcharik
Added 08 Aug 2010
Updated 08 Aug 2010
Type Conference
Year 1994
Where EURODAC
Authors Walling R. Cyre, Jim Armstrong, M. Manek-Honcharik, Alexander J. Honcharik
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