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SyCE: An Integrated Environment for System Design in SystemC

10 years 9 months ago
SyCE: An Integrated Environment for System Design in SystemC
We present an integrated system design environment for SystemC, called SyCE. The system consists of several components for efficient analysis, verification and debugging of SystemC designs. The core tools are 1) ParSyC, a parser for SystemC designs that has also some synthesis options, 2) CheckSyC, a verification tool for formal equivalence checking, property checking and generating checkers for simulation or synthesis, 3) DeSyC, a tool for automatic debugging and error location in netlists, and 4) ViSyC, a visualization tool for schematic and source code view supporting crossprobing and annotation of simulation and debugging results. The tools fully support hierarchy and interact tightly. can be described at different levels of abstraction.
Rolf Drechsler, Görschwin Fey, Christian Genz
Added 25 Jun 2010
Updated 25 Jun 2010
Type Conference
Year 2005
Where RSP
Authors Rolf Drechsler, Görschwin Fey, Christian Genz, Daniel Große
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