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ISMVL
2005
IEEE

Test Generation and Fault Localization for Quantum Circuits

13 years 10 months ago
Test Generation and Fault Localization for Quantum Circuits
It is believed that quantum computing will begin to have a practical impact in industry around year 2010. We propose an approach to test generation and fault localization for a wide category of fault models. While in general we follow the methods used in test of standard circuits, there are two significant differences: (2) we use both deterministic and probabilistic tests to detect faults, (2) we use special measurement gates to determine the internal states. A Fault Table is created that includes probabilistic information. “Probabilistic set covering” and “probabilistic adaptive trees” that generalize those known in standard circuits, are next used.
Marek A. Perkowski, Jacob Biamonte, Martin Lukac
Added 25 Jun 2010
Updated 25 Jun 2010
Type Conference
Year 2005
Where ISMVL
Authors Marek A. Perkowski, Jacob Biamonte, Martin Lukac
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