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GLVLSI
2010
IEEE

Thermal-aware compilation for system-on-chip processing architectures

9 years 7 months ago
Thermal-aware compilation for system-on-chip processing architectures
The development of compiler-based mechanisms to reduce the percentage of hotspots and optimize the thermal profile of large register files has become an important issue. Thermal hotspots have been known to cause severe reliability issues, while the thermal profile of the devices is also related to the leakage power consumption and the cooling cost. In this paper we propose several compilation techniques that, based on an efficient register allocation mechanism, reduce the percentage of hotspots in the register file and uniformly distribute the heat. As a result, the thermal profile and reliability of the device is clearly improved. Simulation results show that the proposed flow achieved 91% reduction of hotspots and 11% reduction of the peak temperature. Categories and Subject Descriptors: D.3.4 Programming Languages:Processors [Compilers]; B.8 Performance and Reliability. General Terms:Algorithms, Management, Reliability.
Mohamed M. Sabry, José L. Ayala, David Atie
Added 10 Jul 2010
Updated 10 Jul 2010
Type Conference
Year 2010
Where GLVLSI
Authors Mohamed M. Sabry, José L. Ayala, David Atienza
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