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» 3D floorplanning with thermal vias
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ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
13 years 9 months ago
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert...
ASPDAC
2005
ACM
86views Hardware» more  ASPDAC 2005»
13 years 11 months ago
Thermal-driven multilevel routing for 3-D ICs
3-D IC has a great potential for improving circuit performance and degree of integration. It is also an attractive platform for system-on-chip or system-in-package solutions. A cr...
Jason Cong, Yan Zhang
ICCAD
2001
IEEE
113views Hardware» more  ICCAD 2001»
14 years 2 months ago
Compact Modeling and SPICE-Based Simulation for Electrothermal Analysis of Multilevel ULSI Interconnects
This paper presents both compact analytical models and fast SPICE based 3-D electro-thermal simulation methodology to characterize thermal effects due to Joule heating in high per...
TingYen Chiang, Kaustav Banerjee, Krishna Saraswat
DAC
2009
ACM
14 years 6 months ago
Exploring serial vertical interconnects for 3D ICs
Three-dimensional integrated circuits (3D ICs) offer a promising solution to overcome the on-chip communication bottleneck and improve performance over traditional two-dimensional...
Sudeep Pasricha
ASPDAC
2008
ACM
107views Hardware» more  ASPDAC 2008»
13 years 7 months ago
Full-chip thermal analysis for the early design stage via generalized integral transforms
The capability of predicting the temperature profile is critically important for timing estimation, leakage reduction, power estimation, hotspot avoidance and reliability concerns ...
Pei-Yu Huang, Chih-Kang Lin, Yu-Min Lee