22 search results - page 1 / 5 » A BIST Solution for The Test of I O Speed |
ITC
2003
IEEE
13 years 10 months ago
2003
IEEE
A delay-locked loop (DLL) based built-in self test (BIST) circuit has been designed with a 0.18 µ m TSMC process (CM018) to test chip I/O speeds, specifically, the setup and hold...
VTS
2002
IEEE
13 years 9 months ago
2002
IEEE
For deep sub-micron system-on-chips (SoC), interconnects are critical determinants of performance, reliability and power. Buses and long interconnects being susceptible to crossta...
VTS
2000
IEEE
13 years 9 months ago
2000
IEEE
1 At-speed testing is becoming increasingly difficult with external testers as the speed of microprocessors approaches the GHz range. One solution to this problem is built-in self-...
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
— Real-time face recognition by computer systems is required in many commercial and security applications because it is the only way to protect privacy and security in the sea of...
IJCAI
1989
13 years 6 months ago
1989
This paper describes a program, called NEWTON, that finds approximate symbolic solutions to parameterized equations in one variable. N E W T O N derives an initial approximation b...