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» A Dynamically-Reconfigurable, Power-Efficient Turbo Decoder
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FCCM
2004
IEEE
103views VLSI» more  FCCM 2004»
13 years 8 months ago
A Dynamically-Reconfigurable, Power-Efficient Turbo Decoder
The development of turbo codes has allowed for nearShannon limit information transfer in modern communication systems. Although turbo decoding is viewed as superior to alternate d...
Jian Liang, Russell Tessier, Dennis Goeckel
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
13 years 8 months ago
VLSI Design of Multi Standard Turbo Decoder for 3G and Beyond
Turbo decoding architectures have greater error correcting capability than any other known code. Due to their excellent performance turbo codes have been employed in several trans...
Imran Ahmed, Tughrul Arslan
FPL
2006
Springer
129views Hardware» more  FPL 2006»
13 years 8 months ago
A Reconfigurable Viterbi Decoder for a Communication Platform
A new large constraint length, soft decision viterbi decoder fabric is presented for deployment using platform based system on chip methodologies. The decoder can be reconfigured ...
Imran Ahmed, Tughrul Arslan
ICMCS
2006
IEEE
98views Multimedia» more  ICMCS 2006»
13 years 10 months ago
Unequal Iterative Decoding for Power Efficient Video Transmission
We present an unequal iterative decoding (UID) approach for minimization of the receiver power consumption subject to a given quality of service, by exploiting data partitioning a...
Yongfang Wang, Songyu Yu, Xiaokang Yang
ASAP
2008
IEEE
161views Hardware» more  ASAP 2008»
13 years 6 months ago
Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
Yang Sun, Yuming Zhu, Manish Goel, Joseph R. Caval...