4 search results - page 1 / 1 » A Fast-Convergence Decoding Method and Memory-Efficient VLSI... |
ICC
2007
IEEE
13 years 11 months ago
2007
IEEE
— We present a new multi-rate architecture for decoding irregular LDPC codes in IEEE 802.16e WiMax standard. The proposed architecture utilizes the value–reuse property of offs...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
Abstract— A low-density parity-check (LDPC) decoder architecture that supports variable block sizes and multiple code rates is presented. The proposed architecture is based on th...
FCCM
2004
IEEE
13 years 8 months ago
2004
IEEE
We describe a flexible hardware encoder for regular and irregular low-density parity-check (LDPC) codes. Although LDPC codes achieve achieve better performance and lower decoding ...