16 search results - page 2 / 4 » A Fault Model and a Test Method for Analog Fuzzy Logic Circu... |
FTCS
1993
13 years 7 months ago
1993
We present a new test response compression method called cumulative balance testing (CBT)that extends both balance testing and accumulatorcompression testing. CBT uses an accumulat...
ATS
2004
IEEE
13 years 9 months ago
2004
IEEE
Logical reversibility occurs in low-power applications and is an essential feature of quantum circuits. Of special interest are reversible circuits constructed from a class of rev...
MEMOCODE
2007
IEEE
14 years 2 days ago
2007
IEEE
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
DDECS
2007
IEEE
14 years 3 days ago
2007
IEEE
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
DAC
2009
ACM
14 years 6 months ago
2009
ACM
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...