4 search results - page 1 / 1 » A Low Power High Performance Radix-4 Approximate Squaring Ci... |
ASAP
2009
IEEE
13 years 8 months ago
2009
IEEE
An implementation of a radix-4 approximate squaring circuit is described employing a new operand dual recoding technique. Approximate squaring circuits have numerous applications ...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
ARITH
2007
IEEE
13 years 11 months ago
2007
IEEE
The floating point unit of the next generation PowerPC is detailed. It has been tested at over 5 GHz. The design supports an extremely aggressive cycle time of 13 FO4 using a tech...
CF
2005
ACM
13 years 7 months ago
2005
ACM
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...