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APCCAS
2006
IEEE
373views Hardware» more  APCCAS 2006»
13 years 8 months ago
A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs
A new low offset dynamic comparator for high resolution high speed analog-to-digital application has been designed. Inputs are reconfigured from the typical differential pair compa...
Vipul Katyal, Randall L. Geiger, Degang Chen
GLVLSI
2000
IEEE
90views VLSI» more  GLVLSI 2000»
13 years 9 months ago
Low power high speed analog-to-digital converter for wireless communications
A new ADC architecture is devised. This architecture is memory based, in which the last sample is used to predict the current one, resulting in both power dissipation and energy r...
A. E. Hussein, Mohamed I. Elmasry
DATE
2000
IEEE
134views Hardware» more  DATE 2000»
13 years 9 months ago
An on Chip ADC Test Structure
In this paper, a new built-in self-test structure to test the static specifications of analog to digital converters (ADCs) is presented. A ramp signal generated by an integrator ...
Yun-Che Wen, Kuen-Jong Lee
CVPR
2010
IEEE
13 years 10 months ago
Optimal Coded Sampling for Temporal Super-Resolution
Conventional low frame rate cameras result in blur and/or aliasing in images while capturing fast dynamic events. Multiple low speed cameras have been used previously with stagger...
Amit Agrawal, Mohit Gupta, Ashok Veeraraghavan, Sr...
IJCAI
2003
13 years 6 months ago
Variable Resolution Particle Filter
Particle filters are used extensively for tracking the state of non-linear dynamic systems. This paper presents a new particle filter that maintains samples in the state space a...
Vandi Verma, Sebastian Thrun, Reid G. Simmons