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ITC
2002
IEEE
127views Hardware» more  ITC 2002»
13 years 9 months ago
A New Test Generation Approach for Embedded Analogue Cores in SoC
M. Stancic, L. Fang, M. H. H. Weusthof, R. M. W. T...
ATS
2003
IEEE
131views Hardware» more  ATS 2003»
13 years 9 months ago
Software-Based Delay Fault Testing of Processor Cores
Software-based self-testing is a promising approach for the testing of processor cores which are embedded inside a System-on-a-Chip (SoC), as it can apply test vectors in function...
Virendra Singh, Michiko Inoue, Kewal K. Saluja, Hi...
DFT
2002
IEEE
128views VLSI» more  DFT 2002»
13 years 9 months ago
Matrix-Based Test Vector Decompression Using an Embedded Processor
This paper describes a new compression/decompression methodology for using an embedded processor to test the other components of a system-on-a-chip (SoC). The deterministic test v...
Kedarnath J. Balakrishnan, Nur A. Touba
DATE
2010
IEEE
161views Hardware» more  DATE 2010»
13 years 9 months ago
BISD: Scan-based Built-In self-diagnosis
Abstract—Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may...
Melanie Elm, Hans-Joachim Wunderlich