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» A Novel Implementation of Tile-Based Address Mapping
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DATE
2004
IEEE
103views Hardware» more  DATE 2004»
13 years 8 months ago
A Novel Implementation of Tile-Based Address Mapping
Tile-based data layout has been applied to achieve various objectives such as minimizing cache conflicts and memory row switching activity. In some applications of tilebased mappi...
Sambuddhi Hettiaratchi, Peter Y. K. Cheung
ICCAD
1997
IEEE
127views Hardware» more  ICCAD 1997»
13 years 9 months ago
OPTIMIST: state minimization for optimal 2-level logic implementation
We present a novel method for state minimization of incompletely-specified finite state machines. Where classic methods simply minimize the number of states, ours directly addre...
Robert M. Fuhrer, Steven M. Nowick
CODES
2006
IEEE
13 years 11 months ago
The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications
Modern embedded systems for image processing involve increasingly complex levels of functionality under real-time and resourcerelated constraints. As this complexity increases, th...
Dong-Ik Ko, Shuvra S. Bhattacharyya
ICCAD
2008
IEEE
162views Hardware» more  ICCAD 2008»
14 years 1 months ago
MAPS: multi-algorithm parallel circuit simulation
— The emergence of multi-core and many-core processors has introduced new opportunities and challenges to EDA research and development. While the availability of increasing paral...
Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif
CGF
2008
153views more  CGF 2008»
13 years 5 months ago
Context Aware Terrain Visualization for Wayfinding and Navigation
To assist wayfinding and navigation, the display of maps and driving directions on mobile devices is nowadays commonplace. While existing system can naturally exploit GPS informat...
Sebastian Möser, Patrick Degener, Roland Wahl...