11 search results - page 1 / 3 » A Novel Low-overhead Delay Testing Technique for Arbitrary T... |
ET
2008
13 years 5 months ago
2008
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
— With increasing process fluctuations in nano-scale technology, testing for delay faults is becoming essential in manufacturing test to complement stuck-at-fault testing. Desig...
DFT
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper presents a novel delay fault testing technique, which can be used as an alternative to the enhanced scan based delay fault testing, with significantly less design overh...
ITC
1997
IEEE
13 years 9 months ago
1997
IEEE
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
IOLTS
2005
IEEE
13 years 10 months ago
2005
IEEE
With the aggressive scaling of the CMOS technology parametric variation of the transistor threshold voltage causes significant spread in the circuit delay as well as leakage spect...