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» A Parallel Hardware Architecture for Image Feature Detection
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ICPR
2004
IEEE
14 years 5 months ago
An FPGA-Based Architecture for Real Time Image Feature Extraction
We propose a novel FPGA-based architecture for the extraction of four texture features using Gray Level Cooccurrence Matrix (GLCM) analysis. These features are angular second mome...
Dimitrios E. Maroulis, Dimitrios K. Iakovidis, Dim...
MM
2005
ACM
215views Multimedia» more  MM 2005»
13 years 10 months ago
OpenVIDIA: parallel GPU computer vision
Graphics and vision are approximate inverses of each other: ordinarily Graphics Processing Units (GPUs) are used to convert “numbers into pictures” (i.e. computer graphics). I...
James Fung, Steve Mann
FPGA
2009
ACM
343views FPGA» more  FPGA 2009»
13 years 11 months ago
Fpga-based face detection system using Haar classifiers
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
VIP
2001
13 years 6 months ago
High-speed Parameterisable Hough Transform Using Reconfigurable Hardware
Recent developments in reconfigurable hardware technologies have offered high-density high-speed devices with the ability for custom computing whilst maintaining the flexibility o...
Dixon D. S. Deng, Hossam A. ElGindy
IPPS
1998
IEEE
13 years 9 months ago
Replicated Shared Object Model for Edge Detection with Spiral Architecture
Edge detection in computer vision and image processing is a process which detects one kind of signi cant features appearing as discontinuities in intensities. A parallel edge detec...
Xiangjian He, Tom Hintz, Ury Szewcow