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IPPS
2006
IEEE
13 years 11 months ago
A high level SoC power estimation based on IP modeling
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...
David Elléouet, Nathalie Julien, Dominique ...
VLSID
2007
IEEE
128views VLSI» more  VLSID 2007»
14 years 6 months ago
A Low Power Frequency Multiplication Technique for ZigBee Transciever
A low-power frequency multiplication technique, developed for ZigBee (IEEE 802.15.4) like applications is presented. We have provided an estimate for the power consumption for a g...
Jagdish Nayayan Pandey, Sudhir S. Kudva, Bharadwaj...
ICA3PP
2005
Springer
13 years 11 months ago
A Low-Level Communication Library for Java HPC
Abstract. Designing a simple but powerful low-level communication library for Java HPC environments is an important task. We introduce new low-level communication library for Java ...
Sang Boem Lim, Bryan Carpenter, Geoffrey Fox, Han-...
GECCO
2004
Springer
148views Optimization» more  GECCO 2004»
13 years 11 months ago
A Multi-objective Approach to Configuring Embedded System Architectures
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
James Northern III, Michael A. Shanblatt
ISCAS
2006
IEEE
102views Hardware» more  ISCAS 2006»
13 years 11 months ago
A low power merge cell processor for real-time spike sorting in implantable neural prostheses
Extremely low power consumption is the critical constraint for designing implantable neural decoders that inter- Desired face directly with the nervous system. Typically a system w...
M. D. Linderman, T. H. Meng