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FCCM
2004
IEEE
94views VLSI» more  FCCM 2004»
13 years 8 months ago
A Structured System Methodology for FPGA Based System-on-A-Chip Design
N. Pete Sedcole, Peter Y. K. Cheung, George A. Con...
FPL
2004
Springer
74views Hardware» more  FPL 2004»
13 years 10 months ago
A Structured Methodology for System-on-an-FPGA Design
Abstract. Increasing logic resources coupled with a proliferation of integrated performance enhancing primitives in high-end FPGAs results in an increased design complexity which r...
N. Pete Sedcole, Peter Y. K. Cheung, George A. Con...
SAMOS
2007
Springer
13 years 11 months ago
FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder
Client-side diversification led the video-coding community to develop scalable video-codecs supporting efficient decoding at varying quality levels. This scalability has a lot of...
Hendrik Eeckhaut, Harald Devos, Philippe Faes, Mar...
FPL
2004
Springer
144views Hardware» more  FPL 2004»
13 years 8 months ago
A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms
A recent trend towards integrating FPGAs with many heterogeneous components, such as memory systems, dedicated multipliers, etc., has made them an attractive option for implementin...
Jingzhao Ou, Viktor K. Prasanna
DSD
2008
IEEE
79views Hardware» more  DSD 2008»
13 years 11 months ago
Digital Systems Architectures Based on On-line Checkers
In this paper, a methodology for generating VHDL descriptions of hardware checkers is presented. It is shown how the methodology can be used to generate on-line checkers of commun...
Martin Straka, Zdenek Kotásek, Jan Winter