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ICCAD
2000
IEEE
91views Hardware» more  ICCAD 2000»
13 years 9 months ago
A Timing-Constrained Algorithm for Simultaneous Global Routing of Multiple Nets
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
Jiang Hu, Sachin S. Sapatnekar
TCAD
2002
73views more  TCAD 2002»
13 years 4 months ago
A timing-constrained simultaneous global routing algorithm
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
Jiang Hu, Sachin S. Sapatnekar
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
14 years 1 months ago
Simultaneous Shield and Buffer Insertion for Crosstalk Noise Reduction in Global Routing
We present a method for incorporating crosstalk reduction criteria into global routing under an innovative power supply architecture, while considering the constraints imposed by ...
Tianpei Zhang, Sachin S. Sapatnekar
ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
13 years 8 months ago
BioRoute: a network-flow based routing algorithm for digital microfluidic biochips
Due to the recent advances in microfluidics, digital microfluidic biochips are expected to revolutionize laboratory procedures. One critical problem for biochip synthesis is the dr...
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang
DAC
2002
ACM
14 years 5 months ago
Towards global routing with RLC crosstalk constraints
Conventional global routing minimizes total wire length and congestion. Experiments using large industrial benchmark circuits show that up to 24% of nets in such routing solutions...
James D. Z. Ma, Lei He