13 search results - page 3 / 3 » A comparison of via-programmable gate array logic cell circu... |
DAC
2005
ACM
13 years 6 months ago
2005
ACM
Implementing logic blocks in an integrated circuit in terms of repeating or regular geometry patterns [6,7] can provide significant advantages in terms of manufacturability and de...
FPGA
2003
ACM
13 years 10 months ago
2003
ACM
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
IOLTS
2008
IEEE
13 years 11 months ago
2008
IEEE
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...