34 search results - page 3 / 7 » A compiler framework for mapping applications to a coarse-gr... |
CASES
2001
ACM
13 years 9 months ago
2001
ACM
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
DATE
2010
IEEE
13 years 9 months ago
2010
IEEE
High-level synthesis has recently started to gain industrial acceptance, due to the improved quality of results and the multi-objective optimizations offered. One optimization area...
SASP
2009
IEEE
14 years 1 days ago
2009
IEEE
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
IPPS
2005
IEEE
2005
IEEE
A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms
13 years 11 months ago
In this paper, we describe a prototype software framework that implements a formalized methodology for partitioning computational intensive applications between reconfigurable har...