34 search results - page 1 / 7 » A complete design for power methodology and flow for large A... |
ISPD
2003
ACM
13 years 10 months ago
2003
ACM
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper describes a novel design methodology to implement a secure DPA resistant crypto processor. The methodology is suitable for integration in a common automated standard ce...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
With device counts on modern-day ASICs crossing the 10 million mark, careful planning of an ASIC design project is necessary to meet time deadlines. Two problems arise in this con...
ISLPED
2010
ACM
13 years 4 months ago
2010
ACM
Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...
DAC
2000
ACM
14 years 5 months ago
2000
ACM
Substrate noise caused by large digital circuits will degrade the performance of analog circuits located on the same substrate. To simulate this performance degradation, the total...