12 search results - page 2 / 3 » A fast congestion estimator for routing with bounded detours |
DAC
2003
ACM
14 years 6 months ago
2003
ACM
In this paper, we present a new method to improve global routing results. By using an amplified congestion estimate to influence a rip-up and reroute approach, we obtain substanti...
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
Because of the increasing dominance of interconnect issues in advanced IC technology, placement has become a critical step in the IC design flow. To get accurate interconnect inf...
ISQED
2007
IEEE
14 years 1 days ago
2007
IEEE
— Fast and accurate routing congestion estimation is essential for optimizations such as floorplanning, placement, buffering, and physical synthesis that need to avoid routing c...
ISVLSI
2007
IEEE
14 years 1 days ago
2007
IEEE
— Y -interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0◦ , 60◦ , and 120◦ . Though X-interconnects are fast replacing the traditio...
TCAD
2002
13 years 5 months ago
2002
Interconnect optimization for VLSI circuits has received wide attention. To model routing surfaces, multiple circuit layers are freabstracted as a single rectilinear plane, ignori...