65 search results - page 12 / 13 » A low dynamic power and low leakage power 90-nm CMOS square-... |
TVLSI
2008
13 years 5 months ago
2008
-- Aggressive CMOS scaling results in low threshold voltage and thin oxide thickness for transistors manufactured in deep submicron regime. As a result, reducing the subthreshold a...
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
In recent years, several alternative devices have been proposed to deal with inherent limitation of conventional CMOS devices in terms of scalability at nanometer scale geometry. ...
ISQED
2007
IEEE
14 years 23 hour ago
2007
IEEE
Straining of silicon improves mobility of carriers resulting in speed enhancement for transistors in CMOS technology. Traditionally, silicon straining is applied in a similar ad-h...
VLSID
2005
IEEE
13 years 11 months ago
2005
IEEE
Abstract—Integrated power supplies are critical building blocks in stateof-the-art portable applications, where they efficiently and accurately transform a battery supply into va...
ISLPED
2009
ACM
13 years 10 months ago
2009
ACM
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...