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HIPEAC
2009
Springer
13 years 11 months ago
Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture
In this article, we present a parallel implementation of a 1024 point Fast Fourier Transform (FFT) operating with a subthreshold supply voltage, which is below the voltage that tur...
Michael B. Henry, Leyla Nazhandali
CSREAESA
2004
13 years 6 months ago
A Low-Power Pipelined Implementation of 2D Discrete Wavelet Transform
Discrete wavelet transform has been incorporated as part of the JPEG2000 image compression standard and is being deployed in various portable consumer products. This raises the in...
Yong Liu, Edmund Ming-Kit Lai, A. Benjamin Premkum...
DATE
2007
IEEE
156views Hardware» more  DATE 2007»
13 years 11 months ago
Process variation tolerant low power DCT architecture
: 2-D Discrete Cosine Transform (DCT) is widely used as the core of digital image and video compression. In this paper, we present a novel DCT architecture that allows aggressive v...
Nilanjan Banerjee, Georgios Karakonstantis, Kaushi...
TCSV
2002
103views more  TCSV 2002»
13 years 4 months ago
A scalable and programmable architecture for 2-D DWT decoding
The compression of still images by means of the discrete wavelet transform (DWT), adopted in the JPEG-2000 and MPEG-4 standards, is becoming more and more widespread because it yie...
Massimo Ravasi, L. Tenze, Marco Mattavelli