22 search results - page 1 / 5 » A new technique for estimating lower bounds on latency for h... |
GLVLSI
2000
IEEE
13 years 9 months ago
2000
IEEE
In this paper we present a novel and fast estimation technique that produces tight latency lower bounds for Data Flow Graphs representing time critical segments of the application...
ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
Linear Pseudo-Boolean Optimization (PBO) is a widely used modeling framework in Electronic Design Automation (EDA). Due to significant advances in Boolean Satisfiability (SAT), ...
DAC
1994
ACM
13 years 9 months ago
1994
ACM
Abstract -- This paper describes a new memory estimation technique for DSP applications written in an applicative language. Since no concept of storage is present in an applicative...
DAC
1999
ACM
13 years 9 months ago
1999
ACM
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...