23 search results - page 4 / 5 » A power and temperature aware DRAM architecture |
DAC
2006
ACM
14 years 5 months ago
2006
ACM
Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet m...
VLSID
2010
IEEE
13 years 8 months ago
2010
IEEE
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. ...
DAC
2005
ACM
14 years 5 months ago
2005
ACM
Physical phenomena such as temperature have an increasingly important role in performance and reliability of modern process technologies. This trend will only strengthen with futu...
ICCD
2004
IEEE
14 years 1 months ago
2004
IEEE
Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP core...
DAC
2011
ACM
12 years 4 months ago
2011
ACM
Existing thermal-aware 3D placement methods assume that the temperature of 3D ICs can be optimized by properly distributing the power dissipations, and ignoring the heat conductiv...