Sciweavers

11 search results - page 1 / 3
» A systematic approach to modeling and analysis of transient ...
Sort
View
ISQED
2009
IEEE
103views Hardware» more  ISQED 2009»
13 years 11 months ago
A systematic approach to modeling and analysis of transient faults in logic circuits
With technology scaling, the occurrence rate of not only single, but also multiple transients resulting from a single hit is increasing. In this work, we consider the effect of th...
Natasa Miskov-Zivanov, Diana Marculescu
ICCAD
2008
IEEE
106views Hardware» more  ICCAD 2008»
14 years 1 months ago
Process variability-aware transient fault modeling and analysis
– Due to reduction in device feature size and supply voltage, the sensitivity of digital systems to transient faults is increasing dramatically. As technology scales further, the...
Natasa Miskov-Zivanov, Kai-Chiang Wu, Diana Marcul...
DAC
2009
ACM
14 years 5 months ago
Computing bounds for fault tolerance using formal techniques
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
André Sülflow, Görschwin Fey, Rol...
GLVLSI
2006
IEEE
115views VLSI» more  GLVLSI 2006»
13 years 10 months ago
Yield enhancement of asynchronous logic circuits through 3-dimensional integration technology
This paper presents a systematic design methodology for yield enhancement of asynchronous logic circuits using 3-D (3-Dimensional) integration technology. In this design, the targ...
Song Peng, Rajit Manohar
DATE
2007
IEEE
154views Hardware» more  DATE 2007»
13 years 11 months ago
Soft error rate analysis for sequential circuits
Due to reduction in device feature size and supply voltage, the sensitivity to radiation induced transient faults (soft errors) of digital systems increases dramatically. Intensiv...
Natasa Miskov-Zivanov, Diana Marculescu